Understanding the Inflection in Wafer Fab Equipment Growth
In my previous blog, I outlined a framework for why we at Applied Materials believe the wafer fab equipment (WFE) market can grow as fast or faster than the broader semiconductor industry. To better understand the context behind this expectation, I would like to take a look back at some of the critical factors that helped bring the WFE sector out of its long period of flat growth in the early part of this century.
The transition took place in 2015, which corresponds with the beginning of the slowdown in classic Moore’s Law scaling – an important development that contributed to the positive inflection in WFE growth. Around the same time as transistors began shrinking at a slower rate, the number of steps needed to make a leading-edge chip began to increase, as can be seen in the chart on the left below. From the 90nm to 20nm generation, the number of steps increased at about 5% per technology node. This rate grew dramatically from 20nm to 5nm, with steps increasing at nearly 30% per node. Specifically, this timeframe saw the transition from 2D planar transistors to 3D FinFETs combined with the need to create new kinds of wiring to solve electrical resistance issues.
With transistor counts growing at a slower pace, chipmakers have begun to build bigger chips. The chart on the right below illustrates the point that we can no longer fit all the transistors we need for advanced server chips within the reticle limit, which is the 850-square-millimeter die size limit of lithography systems. It now takes more than one chip to make a high-end server processor.
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