MicroZed Chronicles: Linear Feedback Shift Register
As a follow on from last week, one of the techniques I like to use to stimulate or capture data in our FPGA designs is a Linear Feedback Shift Register (LFSR).
In the ten-plus years of this blog, I have never talked much about LFSRs, so I am going to focus this blog on exploring them as they are helpful for our FPGA designs. These days, we are a little spoiled with the modern fabric being so capable.
Counters – using a LFSR as a counter can often provide a more efficient and higher performing implementation than alternate approaches.
Data scrambling / descrambling – The output from the LFSR can be combined with data to ensure that long runs of ones or zeros are removed which could result in synchronization problems when received.
Error detection and correction – By selecting the specific polynomial to generate code words, we are able to detect errors in the transmission when the data is received and applied to the same LFSR. Ethernet is a commonly used example.
