A Minimal TTL Processor for Architecture Exploration
From the Proceedings of the 1994 ACM Symposium on Applied Computing. Copyright (c) 1994, Association for Computing Machinery. Permission to copy without fee all or part of this material is granted provided that the copies are not made or distributed for direct commercial advantage, the ACM copyright notice and the title of the publication and its date appear, and notice is given that copying is by permission of the Association for Computing Machinery. To copy otherwise, or to republish, requires a fee and/or specific permission. Keywords: CPU, processors, architecture, education
Computer architecture is presently taught "hands-on" only when adequate VLSI design tools are available. The PISC is a processor constructed from discrete TTL logic, which illustrates the operation of both hardwired and microcoded CPUs. An efficient stack machine is easy to implement, and simple hardware modifications demonstrate interrupts, memory segmentation, microsequencers, parallelism, and pipelining. A standalone PISC board should be an economical and effective tool for teaching processor design.
The study of computer architecture is often an abstract, paper exercise. Students cannot probe the inner workings of a single-chip microprocessor, and few discrete-logic machines are open to student inspection. Only universities that have VLSI design tools can give hands-on experience in processor design and implementation. Less fortunate institutions can only offer their students "book learning."
