I lost 3 weeks of my life trying to wrap my head around the Intel x86–64/AMD64 manuals to try implementing 4-Kbyte Page translation for my hobbyist

x86–64 4Kbyte Page translation design — is this the reason why pages are 4096 bytes aligned?

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2021-06-21 23:00:05

I lost 3 weeks of my life trying to wrap my head around the Intel x86–64/AMD64 manuals to try implementing 4-Kbyte Page translation for my hobbyist OS. The purpose of this small blog post is to document some of the things that in the manual aren’t clear at all. (especially for newcomers)

You have seen that picture a billion times and if you are reading this post you know that you need to create these Page Tables in memory so that the hardware establishes a well-defined interface with the OS for allocating small chunks of memory before moving to 64-bit mode.

Image that I want to create identity-mapped pages for the first 10MB of memory during the early stages of the boot process. This will be useful for loading the kernel in memory memory before moving to Long mode (64-bit).

But if you look closely, you will find something very very odd. We are led to believe that the Page-Table Base Address (0x13000) should be set between the bits 51:12 as per the picture above.