Please note: The FISC design has some major flaws. Rather than fix them, I've incorporated the fixes into the next version of the design: .
The overall design of the CPU is covered in Docs/arch_overview.md, and some details of the expected hardware implementation are in Docs/fisc_implementation.md.
mid-June, 2020: I've ordered PCBs and they have arrived and I've soldered on all the components. The CPU passes most of the tests but I have an issue with addition that I am still working on.