Build a RISC-V CPU From Scratch
It’s a certain kind of itch that drives people to voluntarily build their own CPU. We start thinking about the papered-over gap in our understanding, the one that lurks between how logic gates and flip-flops work individually and how machine code controls a fully assembled processor. What exactly happens in the magic zone where hardwired circuits start dancing to software’s ever-changing tune?
It turns out this itch afflicts enough people that there are commercial kits for makers who want to put a CPU together to see (or hear) it tick, and the Web is littered with home-brewed 4-bit and 8-bit CPUs with architectures that would be familiar to an engineer from the 1970s. I should know—I made one myself. But then I began to wonder: Could I build my own CPU featuring some of the latest technology? Could I design my own fully compliant 32-bit RISC-V central processing unit?
RISC-V is an open-source architecture that’s about 11 years old, and is now starting to make inroads in a world dominated by the x86 and ARM CPU architectures. I was alerted to the possibilities of RISC-V by the work of Robert Baruch, who started a similar project about two years ago but hasn’t yet completed his processor, in part because he had to keep redesigning components he’d built early on to meet the needs of an evolving design.
